Chipdesign Germany Forum 2026
By Tobias Wölfel
We presented our projects at the
Chipdesign Germany Forum
in Dresden.
[Read More]
-
-
OECD Semiconductor Informal Exchange Network in Costa Rica
By Stefan WallentowitzI was honored to be invited as an expert for the 10th meeting of the OECD Semiconductor Informal Exchange Network (SIEN). The meeting took place in Costa Rica on April 21 to April 22, followed by the presentation of the OECD report on the Costa Rican semiconductor industry. [Read More] -
Conference Visits in November 2025
By Markus KrahlLast November turned out to be a busy but rewarding conference month, with two back-to-back trips to very different corners of the world. [Read More] -
Design Your Chip 2026
By Daniel Arevalos -
POEMS Spring School 2026
By Stefan WallentowitzStefan Wallentowitz is holding a lecture and tutorial at this years edition of the POEMS spring school in Aveiro, Portugal. The slides will be available here. [Read More] -
ChipUSM Summer-Camp Chile 2025
By Daniel ArévalosThe ChipUSM Summer Camp 2025 – Digital Track represents one of the educational outcomes of the ongoing efforts of the AEMY research group to promote open-source integrated circuit design education at universities in Germany and worldwide. The course builds on AEMY’s first open-source System-on-Chip (SoC) silicon tape-out, completed in September... [Read More] -
Spade Blog: Advent of Code Processor
By Frans SkarmanAfter solving all of advent of code in hardware, day 8 became too much. The obvious solution: build a custom CPU for the problem. Find out why, and how to Spade made it easy. [View on Spade Blog] -
Opening of TIZIO
By Simon MedererOn December 1, 2025, the new “Transfer- und Innovationszentrum im Oberland” (TIZIO) opened its doors in Bad Tölz. Our research group is part of this research center, operating in one of the four high-tech labs, the IoT-Prototyping Lab. This means we will work alongside our neighboring labs, which focus on... [Read More] -
OSVISE: Project Update
By Tobias WölfelCheck out the latest project update. [View on OSVISE] -
Update on Fault-Injection with Verilator
By Jonathan SchröterAs part of our ongoing efforts to improve tooling for hardware verification and software–hardware co-design, we extended Verilator with support for native fault-injection mechanisms. [Read More] -
Spade Blog: Quickscope
By Frans SkarmanHow long would it take you to write an integrated logic analyzer from scratch? With Spade, it is possible in less than 4 hours and 100 lines of code. Find out how! [View on Spade Blog]